Bio

Bio:

SeongHwan Cho received the B.S. degree in electrical engineering from KAIST, Korea, in 1995, and the M.S. and Ph.D. degrees in EECS from MIT, Cambridge, MA, in 1997 and 2002, respectively. In 2002, he joined Engim, Inc. Acton, MA, where he was involved in data converters and phased-locked loop (PLL) design for IEEE 802.11abg WLANs. Since 2004, he has been with KAIST in the school of EE, where he is now a professor and department head of semiconductor system engineering. He was with Marvell Inc., CA, and Google, London, during 2011-2012 and 2016-17, respectively as research scientist. Prof. Cho's research interests include analog and mixed-signal circuits for high-speed communication, low-power sensors, memory and machine learning. Prof. Cho was the co-recipient of the 2009 IEEE Transactions on Circuits and System Society Guillemin-Cauer Best Paper Award and 2012 ISSCC Takuo Sugano Award for Outstanding Far-East Paper. Prof. Cho has served on the Technical Program Committee on several IEEE conferences, including ISSCC, Symposium on VLSI and A-SSCC. He has served as associate editor of IEEE Journal of Solid-State Circuits, IEEE Trans. on Circuits and Systems-I, and Distinguished Lecturer of IEEE Solid-State Circuits Society. He has twice received Outstanding Lecturer Award from KAIST.

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